The NJ8820 is a synthesiser circuit fabricated on the GPS CMOS process and is capable of achieving high sideband attenuation and low noise performance. It contains a reference oscillator, 11-bit programmable reference divider, digital and sample-and-hold comparators, 10-bit programmable ‘M’ counter, 7-bit programmable ‘A’ counter and the necessary control and latch circuitry for accepting and latching the input data. Data is presented as eight 4-bit words read from an external memory, with the necessary timing signals generated internally. It is intended to be used in conjunction with a two-modulus prescaler such as the SP8710 series to produce a universal binary coded synthesiser.
