• 120 MIPS at 120MHz • 12K x 16-bit Program SRAM • 4K x 16-bit Data SRAM • 1K x 16-bit Boot ROM • Access up to 2M words of program memory or 8M of data memory • Chip Select Logic for glue-less interface to ROM and SRAM • Six (6) independent channels of DMA • Enhanced Synchronous Serial Interfaces (ESSI) • Two (2) Serial Communication Interfaces (SCI) • Serial Port Interface (SPI) • 8-bit Parallel Host Interface • General Purpose 16-bit Quad Timer • JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging • Computer Operating Properly (COP)/Watchdog Timer • Time-of-Day (TOD) • 128 LQFP package • Up to 41 GPIO